M393T6453FZ3-CC中文资料(9)
发布时间:2021-06-06
发布时间:2021-06-06
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256MB, 512MB Registered DIMMs
Operating Temperature Condition
SymbolTOPER
ParameterOperating Temperature
Rating0 to 95
Units
DDR2 SDRAM
Notes
°3
1.Operating Temperature is the case surface temperature on the center/top side of the DRAM. For the measurement conditions, please refer to
JESD51.2 standard.
2.At 0 - 85 °C, operation temperature range are the temperature which all DRAM specification will be supported.
3.At 85 - 95 °C operation temperature range, doubling refresh commands in frequency to a 32ms period ( tREFI=3.9 us ) is required, and to enter to self refresh mode at this temperature range, an EMRS command is required to change internal refresh rate.
Input DC Logic Level
SymbolVIH(DC)VIL(DC)
ParameterDC input logic high DC input logic low
Min.VREF + 0.125
- 0.3
Max.VDDQ + 0.3VREF - 0.125
UnitsVV
Notes
Input AC Logic Level
SymbolVIH(AC)VIL(AC)
ParameterAC input logic high AC input logic low
DDR2-400, DDR2-533Min.VREF + 0.250
-Max.-VREF - 0.250
Min.VREF + 0.200
VREF - 0.200
DDR2-667
Max.
UnitsVV
Notes
AC Input Test Conditions
SymbolVREFVSWING(MAX)
SLEW
Input reference voltage
Input signal maximum peak to peak swingInput signal minimum slew rate
Condition
Value0.5 * VDDQ
1.01.0
UnitsVVV/ns
Notes112, 3
Notes:
1. Input waveform timing is referenced to the input signal crossing through the VIH/IL(AC) level applied to the device under test.
2. The input signal minimum slew rate is to be maintained over the range from VREF to VIH(AC) min for rising edges and the range from VREF to VIL(AC)max for falling edges as shown in the below figure.
3. AC timings are referenced with input waveforms switching from VIL(AC) to VIH(AC) on the positive transitions and VIH(AC) to VIL(AC) on the negativetransitions.
VDDQVIH(AC) min
VSWING(MAX)
VIH(DC) minVREF
VIL(DC) maxVIL(AC) max
delta TF
VREF - VIL(AC) max
Falling Slew =
delta TF
delta TR
VSS
VIH(AC) min - VREF
Rising Slew =
delta TR
< AC Input Test Signal Waveform >