M393T6453FZ3-CC中文资料(5)
发布时间：2021-06-06
元器件交易网
256MB, 512MB Registered DIMMs DDR2 SDRAM
Functional Block Diagram: 256MB, 32Mx72 Module(populated as 1 rank of x8 DDR2 SDRAMs) M393T3253FG(Z)0 / M393T3253FG(Z)3 / M393T3253FZA
DQS0DQS0
DM0/DQS9DM/NU/RDQSDQSDQS4DQS4
DM4/DQS13DQ0DQ1DQ2DQ3DQ4DQ5DQ6DQ7
I/O 0I/O 1I/O 2I/O 3I/O 4I/O 5I/O 6I/O 7
DQ32DQ33DQ34DQ35DQ36DQ37DQ38DQ39
DQS5DQS5
DM5/DQS14NC/DQS14
DM/NU/CSRDQSDQSDQS
DM/NU/RDQSDQSD0
I/O 0I/O 1I/O 2I/O 3I/O 4I/O 5I/O 6I/O 7
D4
DQS1DQS1
DM1/DQS10DQ8DQ9DQ11DQS2DM2/DQS11NC/DQS11
DQ20DQ23
DQS3DQS3
DM3/DQS12DM/NU/RDQSDQSDM/NU/CSRDQSRDQS
DQSDQS
DM/NU/CSRDQSRDQS
DQSDQS
I/O 0I/O 1I/O 2I/O 3I/O 4I/O 5I/O 6I/O 7
D1
DQ40DQ41DQ42DQ43DQ44DQ45DQ46DQ47
DQS6DM6/DQS15NC/DQS15
I/O 0I/O 1I/O 2I/O 3I/O 4I/O 5I/O 6I/O 7
D5
DM/RDQSRDQS
DQSDQS
I/O 0I/O 1I/O 2I/O 3I/O 4I/O 5I/O 6I/O 7
D2
DQ48DQ49DQ50DQ51DQ52DQ53DQ54DQ55
DQS7DQS7
DM7/DQS16I/O 0I/O 1I/O 2I/O 3I/O 4I/O 5I/O 6I/O 7
D6
DM/NU/RDQSDQSDQS8DM8/DQS17NC/DQS17
I/O 0I/O 1I/O 2I/O 3I/O 4I/O 5I/O 6I/O 7
D3
DQ56DQ57DQ58DQ59DQ60DQ61DQ62DQ63I/O 0I/O 1I/O 2I/O 3I/O 4I/O 5I/O 6I/O 7
D7
SCL
DM/NU/CSRDQSRDQS
DQSDQS
Notes :
1. DQ-to-I/O wiring may be changed within a byte.
2. DQ/DQS/DM/CKE/S relationships must be maintained as shown.3. Unless otherwise noted, resister values are 22 Ohms
CB0CB1CB2CB3CB4CB5CB6CB7I/O 0I/O 1I/O 2I/O 3I/O 4I/O 5I/O 6I/O 7
Signals for Address and Command Parity Function (M393T3253FZA)
VDDSPDVDD/VDDQVREFVSS
Serial PDD0 - D8D0 - D8D0 - D8
D8
VSSVSS
PAR_IN100K ohms
C0C1
Register
PPOPAR_IN
The resistors on Par_In, A13, A14, A15, BA2 and the signal line of Err_Out refer to the section: "Register Options for Unused Address inputs"
PCK0-PCK6, PCK8, PCK9 -> CK : DDR2 SDRAMs D0-D8PCK0-PCK6, PCK8, PCK9 -> CK : DDR2 SDRAMs D0-D8PCK7 -> CK : RegisterPCK7 -> CK : Register
S0*
BA0-BA1A0-A12RASCASWECKE0ODT0PCK7
1:1REGISTER
RST
RSO-> CS : DDR2 SDRAMs D0-D8
RBA0-RBA1 -> BA0-BA1 : DDR2 SDRAMs D0-D8
CK0RA0-RA12 -> A0-A12 : DDR2 SDRAMs D0-D8
RRAS -> RAS : DDR2 SDRAMs D0-D8RCAS -> CAS : DDR2 SDRAMs D0-D8
RWE -> WE : DDR2 SDRAMs D0-D8
RCKE0 -> CKE : DDR2 SDRAMs D0-D8RESETRODT0 -> ODT0 : DDR2 SDRAMs D0-D8
* S0 connects to DCS and VDD connects to CSR on the register.
PLL
OE
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