M393T6453FZ3-CC中文资料(6)
发布时间：2021-06-06
元器件交易网
256MB, 512MB Registered DIMMs
RS1DQS0DQS0
DM0/DQS9DM/NU/RDQSDQSDM/NU/RDQSDQSDDR2 SDRAM
Functional Block Diagram: 512MB, 64Mx72 Module(populated as 2 rank of x8 DDR2 SDRAMs) M393T6453FG(Z)0 / M393T6453FG(Z)3 / M393T6453FZA
DQS4DQS4
DM4/DQS13DQ0DQ1DQ2DQ3DQ4DQ5DQ6DQ7
DQS1DM1/DQS10NC/DQS10
DM/NU/CSRDQSRDQS
DQSDQS
DM/NU/CSRDQSRDQS
DQSDQS
DM/NU/RDQSDQSDM/NU/RDQSDQSI/O 0I/O 1I/O 2I/O 3I/O 4I/O 5I/O 6I/O 7
D0
I/O 0I/O 1I/O 2I/O 3I/O 4I/O 5I/O 6I/O 7
D9
DQS5DM5/DQS14NC/DQS14
I/O 0I/O 1I/O 2I/O 3I/O 4I/O 5I/O 6I/O 7
D4
I/O 0I/O 1I/O 2I/O 3I/O 4I/O 5I/O 6I/O 7
D13
DM/NU/CSRDQSRDQS
DQSDQS
DM/NU/CSRDQSRDQS
DQSDQS
DQ8DQ9DQ10DQ11DQ12DQ13DQ14DQ15
DQS2DM2/DQS11NC/DQS11
I/O 0I/O 1I/O 2I/O 3I/O 4I/O 5I/O 6I/O 7
D1
I/O 0I/O 1I/O 2I/O 3I/O 4I/O 5I/O 6I/O 7
D10
DQS6DQS6
DM6/DQS15I/O 0I/O 1I/O 2I/O 3I/O 4I/O 5I/O 6I/O 7
D5
I/O 0I/O 1I/O 2I/O 3I/O 4I/O 5I/O 6I/O 7
D14
DM/NU/RDQSDQSDM/NU/RDQSDQSDM/NU/RDQSDQSDM/NU/RDQSDQSDQ16DQ17DQ18DQ19DQ20DQ21DQ22DQ23
DQS3DQS3
DM3/DQS12I/O 0I/O 1I/O 2I/O 3I/O 4I/O 5I/O 6I/O 7
D2
I/O 0I/O 1I/O 2I/O 3I/O 4I/O 5I/O 6I/O 7
D11
DQS7DQS7
DM7/DQS16I/O 0I/O 1I/O 2I/O 3I/O 4I/O 5I/O 6I/O 7
D6
I/O 0I/O 1I/O 2I/O 3I/O 4I/O 5I/O 6I/O 7
D15
DM/NU/RDQSDQSDM/NU/RDQSDQSDQ24DQ25DQ26DQ27DQ28DQ29DQ30DQ31
DQS8DM8/DQS17NC/DQS17
I/O 0I/O 1I/O 2I/O 3I/O 4I/O 5I/O 6I/O 7
D3
I/O 0I/O 1I/O 2I/O 3I/O 4I/O 5I/O 6I/O 7
D12
DM/NU/RDQSDQSDM/NU/RDQSDQSI/O 0I/O 1I/O 2I/O 3I/O 4I/O 5I/O 6I/O 7
D7
I/O 0I/O 1I/O 2I/O 3I/O 4I/O 5I/O 6I/O 7VDDSPD
SDA
VDD/VDDQVREFVSS
D16
Serial PD
DM/NU/CSRDQSRDQS
DQSDQS
DM/NU/CSRDQSRDQS
DQSDQS
Serial PDD0 - D17D0 - D17D0 - D17
SCL
WPA0
A1
A2
CB0CB1CB2CB3CB4CB5CB6CB7I/O 0I/O 1I/O 2I/O 3I/O 4I/O 5I/O 6I/O 7
D8
I/O 0I/O 1I/O 2I/O 3I/O 4I/O 5I/O 6I/O 7
D17
SA0SA1SA2
Signals for Address and Command Parity Function (M393T6453FZA)
S0*BA0-BA1A0-A12RASCASWECKE0CKE1ODT0ODT1RESET**
PCK7**
1:2REGISTER
RST
RSO-> CS : DDR2 SDRAMs D0-D8C0Register AC0Register BVDDVSSC1C1VDDVDD
PPORBA0-RBA1 -> BA0-BA1 : DDR2 SDRAMs D0-D17
PPOPAR_INPAR_INPAR_IN
RA0-RA12 -> A0-A12 : DDR2 SDRAMs D0-D17
QERR
RRAS -> RAS : DDR2 SDRAMs D0-D17100K ohms
RCAS -> CAS : DDR2 SDRAMs D0-D17The resistors on Par_In, A13, A14, A15, BA2 and the RWE -> WE : DDR2 SDRAMs D0-D17
signal line of Err_Out refer to the section: "Register RCKE0 -> CKE : DDR2 SDRAMs D0-D8
Options for Unused Address inputs"RCKE1 -> CKE : DDR2 SDRAMs D9-D17
RODT0 -> ODT0 : DDR2 SDRAMs D0-D8RODT1 -> ODT1 : DDR2 SDRAMs D9-D17
Notes :
1. DQ-to-I/O wiring may be changed per nibble.
2. Unless otherwise noted, resister values are 22 Ohms
CK0
PLL
OE
Err_Out
S1 connects to DCS and S0 connects to CSR on another Register.** RESET, PCK7 and PCK7 connects to both Registers. Other signals connect to one of two Registers.
PCK0-PCK6, PCK8, PCK9 -> CK : DDR2 SDRAMs D0-D17PCK0-PCK6, PCK8, PCK9 -> CK : DDR2 SDRAMs D0-D17PCK7 -> CK : RegisterCK0
M393T6453FZ3-CC中文资料(6).doc
将本文的Word文档下载到电脑
