IS61LPD102418A-200TQ中文资料(5)

元器件交易网

IS61VPD51236A, IS61VPD102418A, IS61LPD51236A, IS61LPD102418A

165 PBGA PACKAGE PIN CONFIGURATION

1M X 18 (TOP VIEW)

1

ABCDEFGHJKLMNPR

NCNCNCNCNCNCNCNCDQbDQbDQbDQbDQPbNCMODE

2AANCDQbDQbDQbDQbVssNCNCNCNCNCNCNC

3CECE2VDDQVDDQVDDQVDDQVDDQNCVDDQVDDQVDDQVDDQVDDQAA

4BWbNCVssVDDVDDVDDVDDVDDVDDVDDVDDVDDVssAA

5NCBWaVssVssVssVssVssVssVssVssVssVssNCTDITMS

6CE2CLKVssVssVssVssVssVssVssVssVssVssAA1*A0*

7BWEGWVssVssVssVssVssVssVssVssVssVssVssTDOTCK

8ADSCOEVssVDDVDDVDDVDDVDDVDDVDDVDDVDDVssAA

9ADVADSPVDDQVDDQVDDQVDDQVDDQNCVDDQVDDQVDDQVDDQVDDQAA

10AANCNCNCNCNCNCDQaDQaDQaDQaNCAA

ISSI

11ANCDQPaDQaDQaDQaDQaZZNCNCNCNCNCAA

®

Note: * A0 and A1 are the two least significant bits (LSB) of the address field and set the internal burst counter if burst is desired.

PIN DESCRIPTIONS

SymbolAA0, A1ADVADSPADSCGWCLKCECE2CE2BWx (x=a,b)

Pin Name

Address Inputs

Synchronous Burst Address InputsSynchronous Burst AddressAdvance

Address Status ProcessorAddress Status ControllerGlobal Write EnableSynchronous ClockSynchronous Chip SelectSynchronous Chip SelectSynchronous Chip SelectSynchronous Byte WriteControls

SymbolBWEOEZZMODETCK, TDOTMS, TDINC

DQa-DQbDQPa-PbVDDVDDQ

Vss

Pin Name

Byte Write EnableOutput EnablePower Sleep ModeBurst Sequence SelectionJTAG PinsNo Connect

Data Inputs/OutputsData Inputs/OutputsPower Supply

Output Power SupplyGround

Integrated Silicon Solution, Inc. — 1-800-379-4774

Rev.B02/03/06

5