IS61LPD102418A-200TQ中文资料(18)

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IS61VPD51236A,IS61VPD102418A, IS61LPD51236A ,IS61LPD102418A

IEEE 1149.1 SERIAL BOUNDARY SCAN (JTAG)

The IS61LPD/VPD51236A and IS61LPD/VPD102418Ahave a serial boundary scan Test Access Port (TAP) inthe PBGA package only. (The TQFP package not avail-able.) This port operates in accordance with IEEE Stan-dard 1149.1-1900, but does not include all functionsrequired for full 1149.1 compliance. These functions fromthe IEEE specification are excluded because they placeadded delay in the critical speed path of the SRAM. TheTAP controller operates in a manner that does not conflictwith the performance of other devices using 1149.1 fullycompliant TAPs. The TAP operates using JEDEC stan-dard 2.5V I/O logic levels.

ISSI

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TEST ACCESS PORT (TAP) - TEST CLOCK

The test clock is only used with the TAP controller. Allinputs are captured on the rising edge of TCK and outputsare driven from the falling edge of TCK.

TEST MODE SELECT (TMS)

The TMS input is used to send commands to the TAPcontroller and is sampled on the rising edge of TCK. Thispin may be left disconnected if the TAP is not used. Thepin is internally pulled up, resulting in a logic HIGH level.

TEST DATA-IN (TDI)

The TDI pin is used to serially input information to theregisters and can be connected to the input of anyregister. The register between TDI and TDO is chosen bythe instruction loaded into the TAP instruction register.For information on instruction register loading, see theTAP Controller State Diagram. TDI is internally pulled upand can be disconnected if the TAP is unused in anapplication. TDI is connected to the Most Significant Bit(MSB) on any register.

DISABLING THE JTAG FEATURE

The SRAM can operate without using the JTAG feature.To disable the TAP controller, TCK must be tied LOW(Vss) to prevent clocking of the device. TDI and TMS areinternally pulled up and may be disconnected. They mayalternately be connected to VDD through a pull-up resistor.TDO should be left disconnected. On power-up, thedevice will start in a reset state which will not interfere withthe device operation.

TAP CONTROLLER BLOCK DIAGRAM

Integrated Silicon Solution, Inc. — 1-800-379-4774

Rev.B02/03/06

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