IS61LPD102418A-200TQ中文资料(21)

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IS61VPD51236A, IS61VPD102418A, IS61LPD51236A, IS61LPD102418A

INSTRUCTION CODES

Code000

InstructionEXTEST

Description

ISSI

®

Captures the Input/Output ring contents. Places the boundary scan registerbetween the TDI and TDO. Forces all SRAM outputs to High-Z state. Thisinstruction is not 1149.1 compliant.

Loads the ID register with the vendor ID code and places the register betweenTDI and TDO. This operation does not affect SRAM operation.

Captures the Input/Output contents. Places the boundary scan register between TDIand TDO. Forces all SRAM output drivers to a High-Z state.Do Not Use: This instruction is reserved for future use.

Captures the Input/Output ring contents. Places the boundary scan register betweenTDI and TDO. Does not affect the SRAM operation. This instruction does notimplement 1149.1 preload function and is therefore not 1149.1 compliant.Do Not Use: This instruction is reserved for future use.Do Not Use: This instruction is reserved for future use.

Places the bypass register between TDI and TDO. This operation does notaffect SRAM operation.

001010011100

IDCODESAMPLE-ZRESERVEDSAMPLE/PRELOAD

101110111

RESERVEDRESERVEDBYPASS

TAP CONTROLLER STATE DIAGRAM

Integrated Silicon Solution, Inc. — 1-800-379-4774

Rev.B02/03/06

21