元器件交易网

IS61VPD25636A, IS61VPD51218A, IS61LPD25636A, IS61LPD51218A

119 BGA PACKAGE PIN CONFIGURATION512KX18 (TOP VIEW)

1

ABCDEFGHJKLMNPRTU

VDDQNCNCDQbNCVDDQNCDQbVDDQNCDQbVDDQDQbNCNCNCVDDQ

2ACE2ANCDQbNCDQbNCVDDDQbNCDQbNCDQPbAATMS

3AAAVssVssVssBWbVssNCVssVssVssVssVssMODEATDI

4ADSPADSCVDDNCCEOEADVGWVDDCLKNCBWEA1*A0*VDDNCTCK

5AAAVssVssVssVssVssNCVssBWaVssVssVssNCATDO

6

7

AVDDQAADQPa NCNCDQa VDDQNCDQa NCVDDDDQNCISSI

®

DQa NCNCDDQDQa NCNCAA ZZNCDDQNote: * A0 and A1 are the two least significant bits (LSB) of the address field and set the internal burst counter if burst is desired.

PIN DESCRIPTIONS

Symbol

AA0, A1ADVADSPADSCGWCLKCE, CE2BWx (x=a,b)BWE

Pin Name

Address Inputs

Synchronous Burst Address InputsSynchronous Burst AddressAdvance

Address Status ProcessorAddress Status ControllerGlobal Write EnableSynchronous ClockSynchronous Chip SelectSynchronous Byte Write ControlsByte Write Enable

SymbolOEZZMODETCK, TDOTMS, TDINCDQa-DQbDQPa-PbVDDVDDQVss

No ConnectData Inputs/OutputsOutput Power SupplyPower SupplyOutput Power SupplyGroundPin NameOutput EnablePower Sleep ModeBurst Sequence SelectionJTAG Pins