边缘检测电路的硬件实现,用的是Verilog语言,采用的是原理图输入,给出了源代码,对于采用FPGA做图像预处理有着很好的参考价值

Method 1：

使用2個reg doubleedge_detection.v / Verilog

1 /*

2 (C) OOMusou 2008

3

4 Filename : doubleedge_detection.v

5 Compiler : Quartus II 7.2 SP3

6 Description : Demo how to design double edge detection circuit 7 Release : 07/06/2008 1.0

8 */

9

10 module doubleedge_detection (

11 input clk,

12 input rst_n,

13 input i_data_in,

14 output o_double_edge

15 );

16

17 reg r_data_in0;

18 reg r_data_in1;

19

20 assign o_double_edge = r_data_in0 ^ r_data_in1;

21

22 always@(posedge clk, negedge rst_n) begin

23 if (!rst_n) begin

24 r_data_in0 <= 0;

25 r_data_in1 <= 0;

26 end

27 else begin

28 r_data_in0 <= r_data_in1;

29 r_data_in1 <= i_data_in;

30 end

31 end

32

33 endmodule

Method 2：

使用1個reg

doubleedge_detection2.v / Verilog