边缘检测电路的(SOC)(Verilog)(10)
发布时间：2021-06-06
边缘检测电路的硬件实现,用的是Verilog语言,采用的是原理图输入,给出了源代码,对于采用FPGA做图像预处理有着很好的参考价值
1 /*
2 (C) OOMusou 2008
3
4 Filename : doubleedge_detection2.v
5 Compiler : Quartus II 7.2 SP3
6 Description : Demo how to design double edge detection circuit 7 Release : 07/06/2008 1.0
8 */
9
10 module doubleedge_detection2 (
11 input clk,
12 input rst_n,
13 input i_data_in,
14 output reg o_double_edge
15 );
16
17 reg r_data_in0;
18
19 always@(posedge clk, negedge rst_n) begin
20 if (!rst_n)
21 r_data_in0 <= 0;
22 else begin
23 r_data_in0 <= i_data_in;
24
25 if ({r_data_in0, i_data_in} == 2'b10)
26 o_double_edge <= 1;
27 else if ({r_data_in0, i_data_in} == 2'b01)
28 o_double_edge <= 1;
29 else
30 o_double_edge <= 0;
31
32 // another method
33 // o_double_edge <= r_data_in0 ^ i_data_in;
34 end
35 end
36
37 endmodule
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