AT45D081中文资料(5)

AT45D081

7AC Waveforms

Two different timing diagrams are shown below. Waveform 1 shows the SCK signal being low when CS makes a high-

to-low transition, and Waveform 2 shows the SCK signal being high when CS makes a high-to-low transition. Both wavforms show valid timing diagrams. The setup and hold times for the SI signal are referenced to the low-to-high transition on the SCK signal.Waveform 1 shows timing that is also compatible with SPI

Mode 0, and Waveform 2 shows timing that is compatible with SPI Mode 3.

Waveform 1 – Inactive Clock Polarity Low CS

SCK

SI SO tCSS VALID IN

tH

tSU tWH tWL tCSH

tCS

tV HIGH IMPEDANCE VALID OUT tHO tDIS

HIGH IMPEDANCE

Waveform 2 – Inactive Clock Polarity High CS

SCK

SI SO tCSS VALID IN

tH

tSU tWL tWH tCSH

tCS

tV HIGH Z VALID OUT tHO tDIS

HIGH IMPEDANCE

Command Sequence for Read/Write Operations (Except Status Register Read)

Notes: 1.“r” designates bits reserved for larger densities.

2.It is recommended that “r” be a logical “0” for densities of 8M bit or smaller.

3.For densities larger than 8M bit, the “r” bits become the most significant Page Address bit for the appropriate density.

SI CMD 8 bits 8 bits 8 bits

MSB Reserved for larger densities Page Address (PA11-PA0)Byte/Buffer Address

(BA8-BA0/BFA8-BFA0)

LSB

r r r X X X X X X X X X X X X X X X X X X X X X 元器件交易网

AT45D081

8

Main Memory Page Program through Buffers

SI

CMD

n

n+1

Last Byte

· Completes writing into selected buffer · Starts self-timed erase/program operation

CS r r r, PA11-7

PA6-0, BFA8

BFA7-0

Buffer Write

SI

CMD

X

X···X, BFA8

BFA7-0

n

n+1

Last Byte

· Completes writing into selected buffer

CS Buffer to Main Memory Page Program (Data from Buffer Programmed into Flash Page)

SI

CMD

PA6-0, X

CS Starts self-timed erase/program operation

r r r, PA11-7

Each transition represents

8 bits and 8 clock cycles

Write Operations

The following block diagram and waveforms illustrate the various write sequences available.

FLASH MEMORY ARRAY

PAGE (264 BYTES)

BUFFER 2 (264 BYTES)

BUFFER 1 (264 BYTES)

I/O INTERFACE

SI

BUFFER 1 TO MAIN MEMORY PAGE PROGRAM

MAIN MEMORY PAGE PROGRAM THROUGH BUFFER 2

BUFFER 2 TO MAIN MEMORY PAGE PROGRAM

MAIN MEMORY PAGE PROGRAM THROUGH BUFFER 1

BUFFER 1

WRITE

BUFFER 2WRITE

n = 1st byte written n+1 = 2nd byte written

元器件交易网