JAN1N757DUR中文资料(2)

发布时间:2021-06-06

NOTE 1: Standard tolerance on JEDEC types shown is +/- 10%. Suffix letter A denotes +/- 5% tolerance; suffix

letter C denotes +/- 2%; and suffix letter D denotes +/- 1% tolerance.

NOTE 2: Voltage measurements to be performed 20 seconds after application of dc test current.

NOTE 3: Zener impedance derived by superimposing on I ZT , a 60 cps, rms ac current equal to 10% I ZT (2mA ac). See MicroNote 202 for typical zener Impedance variation with different operating currents.

NOTE 4: Allowance has been made for the increase in V Z due to Z Z and for the increase in junction temperature as the unit approaches thermal equilibrium at the power dissipation of 400 mW.

R A T E D P O W E R D I S S I P A T I O N - m W

TEMPERATURE COEFFICIENT mV/o

C

T E M P E R A T U R E C O E F F I C I E N T %/ºC

T L – LEAD TEMPERATURE (o

C) 3/8” FROM BODY or NOMINAL ZENER VOLTAGE (VOLTS)

T A on FR4 PC BOARD

FIGURE

1 FIGURE 2

POWER DERATING CURVE

ZENER VOLTAGE TEMPERATURE

COEFFICIENT vs. ZENER VOLTAGE

Microsemi

Scottsdale Division

8700 E. Thomas Rd. PO Box 1390, Scottsdale, AZ 85252 USA, (480) 941-6300, Fax: (480) 947-1503

Page 2

Copyright 2003 10-31-2003 REV B

元器件交易网

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