MAX2023_1中文资料(3)

MAX2023 Evaluation Kit

which is rejected. Note that the sideband suppression isabout 45dB typical down from the desired sideband. Thedesired sideband power level should be approximately+3dBm (+6dBm output power including 3dB pad loss).Phase and amplitude differences at the I and Q inputsresult in degradation of the sideband suppression. Notethat the spectrum analyzer’s uncalibrated absolute mag-nitude accuracy is typically no better than ±1dB.

LO Bias

The bias current for the integrated LO buffer is set withresistor R1 (432 ±1%). Resistors R2 (562 ±1%) andR3 (301 ±1%) set the bias currents for the LO driveramplifiers. Increasing the value of R1, R2, and R3reduces the current, but the device operates at reducedperformance levels. Doubling the values of R1, R2, andR3 reduces the total current by approximately 140mA,but degrades OIP3 by approximately 6dB.

Evaluates: MAX2023

The MAX2023 is designed for upconverting (downcon-verting) to (from) a 1500MHz to 2300MHz RF from (to)baseband. Applications include multicarrier 1500MHz to2300MHz GSM/EDGE, cdma2000, and WCDMA. Directupconversion (downconversion) architectures areadvantageous since they significantly reduce transmitter(receiver) cost, part count, and power consumption com-pared to traditional heterodyne conversion systems.

The MAX2023 integrates internal baluns, an LO buffer, aphase splitter, two LO driver amplifiers, two matchedIF Bias

LO leakage nulling is usually accomplished by adjust-ing the external driving DACs to produce an offset inthe common-mode voltage to compensate for anyimbalance from I+ to I- and from Q+ to Q-.

The EV kit has an added feature to null the LO leakageif the above method is not available. To enable thisadded feature, first install 8k resistors for R8 throughR11 (see Figure 3 for schematic details). To minimizecross coupling of the BB signals, consider adding indouble-balanced passive mixers, and a wideband quad-rature combiner. The MAX2023’s high-linearity mixers, inthe C22 through C25 bypass capacitors. For thisconjunction with the part’s precise in-phase and quadra-method to work, a DC-coupled source impedanceture channel matching, enable the device to possess(typically 50 ) needs to appear on all four basebandexcellent dynamic range, ACLR, 1dB compression point,inputs to form voltage-dividers with the 8k injectionand LO and sideband suppression characteristics. Theseresistors. Use a shunt to connect pin 1 of J7 to pin 2 offeatures make the MAX2023 ideal for multicarrier genera-J7 and a second shunt to connect pin 1 of J8 to pin 2tion, like cdma2000 or WCDMA.

of J8. Set two DC supplies to 0V and connect one toThe MAX2023 EV kit circuit allows for thorough analysisQBIAS (TP4) and one to IBIAS (TP3). Observe the LOand a simple design-in.

leakage level out of the RF port and slowly adjust theQBIAS positive and observe whether the LO leakageSupply-Decoupling Capacitors

increase or decreases. If the LO leakage decreases,The MAX2023 has several RF processing stages thatthe polarity of the offset is correct. If the LO leakageuse the various VCCpins. While they have on-chipincreases, QBIAS can be adjusted negative or thedecoupling, off-chip interaction between them canshunt can be moved on J8 to connect pin 2 to pin 3.degrade gain, linearity, carrier suppression, and outputPerform the same adjustment and method to the IBIASpower. Proper voltage-supply bypassing is essential for(TP3) supply. Optimize the QBIAS and IBIAS voltageshigh-frequency circuit stability.

to null out the LO leakage.

C1, C6, C7, C10, and C13 are 22pF supply-decouplingExternal Diplexer

capacitors used to filter high-frequency noise. C2, C5,LO leakage at the RF port can be nulled to a level lessC8, C11, and C12 are larger 0.1µF capacitors used forthan -80dBm by introducing DC offsets at the I and Qfiltering lower-frequency noise on the supply.

ports. However, this null at the RF port can be compro-DC-Blocking Capacitors

mised by an improperly terminated I/Q IF interface.Care must be taken to match the I/Q ports to the dri-The MAX2023 has internal baluns at the RF output andving DAC circuitry. Without matching, the LO’s sec-LO input. These inputs have almost 0 resistance atond-order (2fDC, so DC-blocking capacitors C3 and C9 are used totor’s I/Q input port where it can mix with the internal LOLO) term may leak back into the modula-prevent any external bias from being shunted directlysignal to produce additional LO leakage at the RF out-to ground.

put. This leakage effectively counteracts against the LOnulling. In addition, the LO signal reflected at the I/Q IFport produces a residual DC term that can disturb thenulling condition.

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