MAX6319LHUK44B-T中文资料(7)

5-Pin µP Supervisory Circuits with

Watchdog and Manual Reset

Bidirectional RESET Output

scratch. If, on the other hand, RESETis high after aThe MAX6316M/MAX6318MH/MAX6319MH are designeddelay of two external-clock cycles, the processorto interface with µPs that have bidirectional reset pins,knows that it caused the reset itself and can jump to asuch as the Motorola 68HC11. Like an open-drain output,different vector and use stored-state information tothese devices allow the µP or other devices to pull thedetermine what caused the reset.

bidirectional reset (RESET) low and assert a reset condi-tion. However, unlike a standard open-drain output, itA problem occurs with faster µPs; two external-clockincludes the commonly specified 4.7kΩpullup resistorcycles are only 500ns at 4MHz. When there are severalwith a P-channel active pullup in parallel.

devices on the reset line, and only a passive pullup resis-tor is used, the input capacitance and stray capacitanceThis configuration allows the MAX6316M/MAX6318MH/can prevent RESETfrom reaching the logic high state (0.8MAX6319MH to solve a problem associated with µPs VCC) in the time allowed. If this happens, all resets willthat have bidirectional reset pins in systems where sev-be interpreted as external. The µP output stage is guaran-eral devices connect to RESET(Figure 3). These µPsteed to sink 1.6mA, so the rise time can not be reducedcan often determine if a reset was asserted by an exter-considerably by decreasing the 4.7kΩinternal pullupnal device (i.e., the supervisor IC) or by the µP itselfresistance. See Bidirectional Pullup Characteristics in the(due to a watchdog fault, clock error, or other source),Typical Operating Characteristics.

and then jump to a vector appropriate for the source ofthe reset. However, if the µP does assert reset, it doesThe MAX6316M/MAX6318MH/MAX6319MH overcomenot retain the information, but must determine thethis problem with an active pullup FET in parallel with thecause after the reset has occurred.

4.7kΩresistor (Figures 4 and 5). The pullup transistorholds RESEThigh until the µP reset I/O or the supervisoryThe following procedure describes how this is done incircuit itself forces the line low. Once RESETgoes belowthe Motorola 68HC11. In all cases of reset, the µP pullsVPTH, a comparator sets the transition edge flip-flop, indi-RESETlow for about four external-clock cycles. It thencating that the next transition for RESETwill be low toreleases RESET, waits for two external-clock cycles,high. When RESETis released, the 4.7kΩresistor pullsthen checks RESET’s state. If RESETis still low, the µPRESETup toward VCC. Once RESETrises above VPTHconcludes that the source of the reset was externalbut is below (0.85 x VCC), the active P-channel pullupand, when RESETeventually reaches the high state, itturns on. Once RESETrises above (0.85 x VCC) or thejumps to the normal reset vector. In this case, stored-2µs one-shot times out, the active pullup turns off. Thestate information is erased and processing begins from

parallel combination of the 4.7kΩpullup and the

Figure 3. MAX6316M/MAX6318MH/MAX6319MH Supports Additional Devices on the Reset Bus

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MAX6316–MAX6322