MAX6319LHUK44B-T中文资料(6)
时间:2025-07-09
时间:2025-07-09
5-Pin µP Supervisory Circuits with Watchdog and Manual ResetMAX6316–MAX6322
Figure 1. Functional Diagram
_______________Detailed Description
A microprocessor’s (µP) reset input starts or restarts theµP in a known state. The reset output of the MAX6316–MAX6322 µP supervisory circuits interfaces with thereset input of the µP, preventing code-execution errorsduring power-up, power-down, and brownout condi-tions (see the Typical Operating Circuit). The MAX6316/MAX6317/MAX6318/MAX6320/MAX6321 are also capa-ble of asserting a reset should the µP become stuck inan infinite loop.
the watchdog timeout period (tWD). Reset remains assert-ed for the specified reset active timeout period (tRP) afterVCCrises above the reset threshold, after MRtransitionslow to high, or after the watchdog timer asserts the reset(MAX6316_/MAX6317H/MAX6318_H/MAX6320P/MAX6321HP). After the reset active timeout period (tRP)expires, the reset output deasserts, and the watchdogtimer restarts from zero (Figure 2).
Reset Output
The MAX6316L/MAX6318LH/MAX6319LH feature anactive-low reset output, while the MAX6317H/MAX6318_H/MAX6319_H/MAX6321HP/MAX6322HPfeature an active-high reset output. RESETis guaran-teed to be a logic low and RESET is guaranteed to be alogic high for VCCdown to 1V.
The MAX6316–MAX6322 assert reset when VCCis belowthe reset threshold (VRST), when MRis pulled low(MAX6316_/MAX6317H/MAX6319_H/MAX6320P/MAX6322HP only), or if the WDI pin is not serviced within
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Figure 2. Reset Timing Diagram
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