Intellectual property metering(2)

Abstract. We have developed the first hardware and software (intellectual property) metering scheme that enables reliable low overhead proofs for the number of manufactured parts and copied programs. The key idea is to make each design slightly different d

also identified hardware metering as one the key requirements for intellectual property protection.We propose a new intellectual property (IP) usage metering approach which allows IP providers to control proper collection of their IP royalties. The key idea of the hardware metering scheme is to make a very small part of the design programmable at the configuration time and to consequently configure this part for each manufactured chip in a unique way. Different configurations correspond to implementations which are differently scheduled or have different register assignments. Of course, this principle can be applied to other synthesis steps, including ones during logic synthesis or physical design.

Once when each manufactured chip or released software has a unique ID, it is rela-tively straightforward to enforce proper royalty agreements. For example, in hardware metering, if a foundry produces n chips which IDs are not reported to the design house in addition to p chips which are reported and approved, the probability that a randomly selected chip from the field has a non-approved ID is equal to n/n+p. Therefore with rela-tively few tests one can expect a high probability of detecting unauthorized chips.

An obvious, albeit naive, alternative to the proposed metering scheme is to just add a disconnected extra piece of programmable memories which carries the ID mark of a spe-cific manufactured IC or to add extra identification code to the software. The first advan-tage of the proposed distributed and integrated within design hardware metering scheme over this straightforward scheme is that it has lower hardware overhead, since it leverages a part of don’t-care signals in the finite state machine of the hardware design or an unused state in the software program. However, since the overall overhead for both schemes is low, there is a number of much more important advantages. What is common to all these attacks is that they externally induced controllability or observability. The approach also provides some level of protection against reverse engineering. For example in hardware, the presence of programmable control path instead of hard-wired logic makes reverse engineering more difficult since essentially all reverse engineering schemes require multi-ple chips to be dissected [1, 24]. Since, now each chip is slightly different but has the same functionality, the reverse engineering process is more difficult.

Furthermore, distributed programmable resources in the control part have a number of potential positive side effects. For example, they can be used to facilitate debugging [31] and engineering change during the design phase or testing once the chip is manufactured [10].

Finally, it is interesting and important to discuss the relationship of the proposed hardware metering scheme with fingerprinting schemes for IP protection [5]. For exam-ple, fingerprinting-based metering solution is to give the manufacturer the number of IPs as stated in the licensing agreement, each IP has a unique fingerprint and implements the same functionality [20]. If the manufacturer uses one piece of IP more than once, then they face risk of being caught by the IP provider from detecting multiple copies of the same fingerprint. However, this challenges the mass foundry production line since each IP requires the unique mask and makes tuning of parameters of the foundry line to design much more difficult. Also, fingerprinting will inevitably introduce a significantly large overhead since it aims at placing hidden information in all parts of the hardware/software design and follows random signature driven constraints.

1.2 Motivational Example

To illustrate the key ideas behind the hardware metering approach, consider the sec-ond order continued fraction IIR filter [9] shown in Figure 1. For simplicity, we assume