LC75813T-E;中文规格书,Datasheet资料

时间:2025-05-02

Ordering number : ENN7159

CMOS IC

Overview

The LC75813E and LC75813T are 1/3 duty and 1/4 dutygeneral-purpose LCD drivers that can be used forfrequency display in electronic tuners under the control ofa microcontroller. The LC75813E and LC75813T candrive an LCD with up to 344 segments directly. TheLC75813E and LC75813T can also control up to 8general-purpose output ports. Since the LC75813E andLC75813T use separate power supply systems for theLCD drive block and the logic block, the LCD driverblock power-supply voltage can be set to any voltage inthe range 2.7 to 6.0 volts, regardless of the logic blockpower-supply voltage.

Features

Switching between 1/3 duty and 1/4 duty drivetechniques under serial data control.

Switching between 1/2 bias and 1/3 bias drivetechniques under serial data control.

Up to 261 segments for 1/3 duty drive and 344 segmentsfor 1/4 duty drive can be displayed.

Serial data input supports CCB format communicationwith the system controller.

Serial data control of the power-saving mode basedbackup function and all the segments forced offfunction.

Serial data control of switching between the segmentoutput port and the general-purpose output port

functions.

Specifications

Absolute Maximum Ratings at Ta = 25°C, VSS= 0 V

Parameter

Maximum supply voltage

SymbolVDDmaxVLCDmaxVIN1

Input voltage

VIN2VIN3

Output voltage

VOUT1VOUT2IOUT1

Output current

Allowable power dissipationOperating temperatureStorage temperature

IOUT2IOUT3Pd maxToprTstg

VDDVLCD

CE, CL, DI, INHOSC

VLCD1, VLCD2OSC

ConditionsRatings–0.3 to +7.0–0.3 to +7.0–0.3 to +7.0–0.3 to VDD+ 0.3–0.3 to VLCD+ 0.3–0.3 to VDD+ 0.3–0.3 to VLCD+ 0.3

30035200

–40 to +85–55 to +125

UnitV

V

S1 to S87, COM1 to COM4, P1 to P8S1 to S87COM1 to COM4P1 to P8Ta = 85°C

VµAmAmW°C°C

CCB is a trademark of SANYO ELECTRIC CO., LTD. CCB is SANYO’s original bus format and all the busaddresses are controlled by SANYO.

20102RM (OT) No. 7159-1/26

Serial data control of frame frequency for common andsegment output waveforms.

High generality, since display data is displayed directlywithout decoder intervention.

Independent VLCDfor the LCD driver block (VLCDcanbe set to any voltage in the range 2.7 to 6.0 volts,regardless of the logic block power-supply voltage.) RC oscillator circuit

Package Dimensions

unit: mm

3151A-QFP100E

unit: mm

3274-TQFP100 (14×14)

Allowable Operating Ranges at Ta = –40 to +85°C, VSS= 0 V

Parameter

Supply voltageInput voltage

Input high level voltageInput low level voltage

Recommended external resistanceRecommended external capacitanceGuaranteed oscillation rangeData setup timeData hold timeCE wait timeCE setup timeCE hold time

High level clock pulse widthLow level clock pulse widthRise timeFall time

INH switching time

SymbolVDDVLCDVLCD1VLCD2VIHVILROSCCOSCfOSCtdstdhtcptcstchtøHtøLtrtftc

VDDVLCDVLCD1VLCD2

OSCOSCOSC

CL, DI: Figure 2CL, DI: Figure 2CE, CL: Figure 2CE, CL: Figure 2CE, CL: Figure 2CL: Figure 2CL: Figure 2CE, CL, DI: Figure 2CE, CL, DI: Figure 2INH, CE: Figure 3

1019160160160160160160160

160160

0.8 VDD

39100038

76

Conditions

Ratings

min2.72.7

2/3 VLCD1/3 VLCD

typ

max6.06.0VLCDVLCD6.00.2 VDD

UnitVVVVk pFkHznsnsnsnsnsnsnsnsnsµs

No. 7159-2/26

Electrical Characteristics for the Allowable Operating Ranges

Parameter

Hysteresis

Input high level currentInput low level currentOutput high level voltage

SymbolVHIIHIILVOH1VOH2VOH3VOL1

Output low level voltage

VOL2VOL3VMID1VMID2

Output middle level voltage*1

VMID3VMID4VMID5

Oscillator frequency

fOSCIDD1IDD2

Current drain

ILCD1ILCD2ILCD3

I= 6.0 VI= 0 VS1 to S87: IO= –20 µACOM1 to COM4: IO= –100 µAP1 to P8: IO= –1 mAS1 to S87: IO= 20 µACOM1 to COM4: IO= 100 µAP1 to P8: IO= 1 mA

COM1 to COM4: 1/2 bias, IO= ±100 µAS1 to S87: 1/3 bias, IO= ±20 µAS1 to S87: 1/3 bias, IO= ±20 µACOM1 to COM4: 1/3 bias, IO= ±100 µACOM1 to COM4: 1/3 bias, IO= ±100 µAOSC: ROSC= 39 k , COSC= 1000 pFVDD: Power-saving mode

VDD: VDD= 6.0 V, output open, fOSC= 38 kHzVLCD: Power-saving mode

VLCD: VLCD= 6.0 V, output open, 1/2 bias, fOSC= 38 kHzVLCD: VLCD= 6.0 V, output open, 1/3 bias, fOSC= 38 kHz

200120250

1/2 VLCD–

0.92/3 VLCD–

0.91/3 VLCD–

0.92/3 VLCD–

0.91/3 VLCD–

0.9

30.4

38

–5.0VLCD– 0.9VLCD– 0.9VLCD– 0.9

0.90.90.9

1/2 VLCD+

0.92/3 VLCD+

0.91/3 VLCD+

0.92/3 VLCD+

0.91/3 VLCD+

0.9

45.655005400240

µAkHzVVV

Conditions

Ratings

min

typ0.1 VDD

5.0max

UnitVµAµA

Note:*1Excluding the bias voltage generation divider resistors built in the VLCD1 and VLCD2. (See Figure 1.)

Figure 1

No. 7159-3/26

1.When CL is stopped at the low level

CE

CL

VIH50%VIL

DI

VIHVIL

2.

CE

CL

DI

Figure 2

Block Diagram

No. 7159-4/26

Pin Functions

Pin Assignments

No. 7159-5/26

Serial Data Transfer Format1. 1/3 duty

xWhen CL is stopped at the low level

CECLDI

8 bits87 bits15 bits2 bits

8 bits87 bits15 bits2 bits

Note: DD···Direction data.

No. 7159-6/26

yWhen CL is stopped at the high level

CECLDI

Note: DD···Direction data.

CCB address......40H

D1 to D261........Display data

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