基于atf54143的低噪放LNA的设计100M-500M

100M-500M低噪放设计方案

A 100 MHz to 500 MHz Low Noise Feedback Amplifier using ATF-54143

Application Note 5057

Introduction

In the last few years the leading technology in the area of low noise amplifier design has been gallium arsenide (GaAs) devices, MESFET, and pHEMT. Power amplifiers based on GaAs can achieve high efficiency and linearity, as well as ity, with a second feature offering a means of reducing the overall stage gain to the specified 20 dB level. The amplifier design specification includes operation from a 5V supply with current consumption of less than 65 mA.

provide high output power. Recently, Enhancement Mode pHEMT technology has demonstrated industry leading power added efficiency (PAE) and linearity performance for amplifier applications. The E-pHEMT technology provides high gain and very low noise. The high gain at low frequen-cies enables the use of feedback to linearize the E-pHEMT device. This application note shows why E-pHEMT technology can provide superior electrical performance for low noise and high linearity amplifier design in UHF and VHF wireless communications bands.

Design GoalsThe goal of the amplifier design is to produce a 100 to 500 MHz LNA, with an output third order intercept point (OIPof +36 dBm, a noise figure below 2.0 dB, and 20 dB gain with 3) a flat gain response. RC feedback was used to provide good input and output match and to ensure unconditional stabil-The Avago Technologies’ ATF-54143 is one of a family of high dynamic range, low noise enhancement mode PHEMT discrete transistors designed for use in low cost commercial applications in the VHF through 6 GHz fre-quency range. It is housed in a 4-lead SC-70 (SOT-343) surface mount plastic package, and operates from a single regulated supply. If an active bias is desirable for r

epeatability of the bias setting—particularly desirable in h igh-volume production—the ATF-54143 requires only the addition of a single PNP bipolar junction transistor. Compared to amplifiers using depletion mode devices,

the E-pHEMT design has a lower part count and a more compact layout. Besides having a very low typical noise figure (0.5 dB), the Avago Technologies’ ATF-54143 is specified at 2 GHz and 3-volt bias to provide a +36 dBm intercept point at 60 mA drain current. A data sheet for this http://www.77cn.com.cn/litweb/pdf/5989-0034EN.pdf

device may be downloaded from: http://literature.

100M-500M低噪放设计方案

Low Noise E-pHEMT Amplifier Design

Using Avago Technologies’ EEsof Advanced Design System software, the amplifier circuit can be simulated in both linear and non-linear modes of operation. For the linear analysis the transistors can be modeled with a two-port s-parameter file using Touchstone format. More information about Avago Technologies’ EDA software may be found at: http://www.77cn.com.cn/eesof-eda. The appropriate ATF54143.s2p file can be downloaded from the Avago Technologies’ Wireless Design Center web site: http://www.type ATF-54143 in the Quick Search at the top of the page. Under Search Results, click on the underlined ATF-54143. Scroll down to the S-parameters listing for 60 mA).

For the non-linear analysis, a harmonic–balance (HB) simulation was used. HB is preferred over other non-linear methods because it is computationally fast, handles both distributed and lumped element circuitry, and can easily include higher-order harmonics and intermodulation prod-ucts. HB was used for the simulation of the 1 dB compression point (P-1dB) and output third order intercept point (OIP3). Although this non-linear transistor model closely predicts the DC and small signal behavior (including noise), it does not correctly predict the intercept point. To properly model the exceptionally high linearity of the E-pHEMT transistor, a better model is required.

Figure 1. ATF-54143 100-500 MHz HLA Active Bias Circuit Schematic.

2

100M-500M低噪放设计方案

Besides providing information regarding gain, P-1dB, noise figure, and input and output return loss, the simulation provides very important information regarding circuit stability. Unless a circuit is actually oscillating on the bench, it may be difficult to predict instabilities without actually presenting various VSWR loads at various phase angles to the amplifier. Calculating the Rollett stability factor (K) and generating stability circles are two methods made considerably easier with computer simulations. Simulated and measured results show the stability factor, K>1 (see Figure 2), at the cost of reduced third-order intercept point To meet the goals for noise figure, intercept point, and gain, the drain source current (Ids) was chosen to be 60 mA. The characterization data in the device data sheet shows that 60 mA gives the best IP3, combined with a very low mini-mum noise figure (Fmin). Also, as shown in the data sheet, a 3 V drain-to-source voltage (Vds) gives a slightly higher gain and easily allows the use of a regulated 5 V supply. The use of a controlled amount of source inductance, usu-ally only a few tenths of a nanoHenry, can often be used to enhance LNA performance. This is effectively equivalent and output power, through the use of a series resistor on the output.

)

K

( ROTCAF YTILIBATS TTELLOR0.00

024

6

FREQUENCY (GHz)

Figure 2. Simulated and measured stability factor K.

3

to increasing the source leads by approximately .025 inch. The effect can be easily modeled using an RF simulation tool such as ADS. The usual side effect of excessive source inductance is gain peaking at a high frequency and resul-tant oscillations.

Figure 3. Suggested RF layout to minimize inductance in feedback network.

100M-500M低噪放设计方案

Active Bias

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