EDA实验报告 触发器及应用及移位寄存器(2)
时间:2025-07-09
时间:2025-07-09
实验目的:1.触发器的工作原理。2.基本时序电路的VHDL代码编写。3.按键消抖电路应用。4.定制LPM原件。5.VHDL语言中元件例化的使用。6.移位寄存器的工作原理及应用。实验要求:1.运用LPM原件定制DFF触发器,并调用LPM 定制的DFF触发器,用VHDL语言的元件例化实现消抖电路并了解其工作原理。
clock : IN STD_LOGIC ;
data
q
);
END mydff;
: IN STD_LOGIC ; : OUT STD_LOGIC ARCHITECTURE SYN OF mydff IS SIGNAL sub_wire0 SIGNAL sub_wire1 SIGNAL sub_wire2 SIGNAL sub_wire3 COMPONENT lpm_ff GENERIC ( ); lpm_fftype lpm_type lpm_width : STRING; : STRING; : NATURAL : STD_LOGIC_VECTOR (0 DOWNTO 0); : STD_LOGIC ; : STD_LOGIC ; : STD_LOGIC_VECTOR (0 DOWNTO 0); PORT ( clock : IN STD_LOGIC ; q : OUT STD_LOGIC_VECTOR (0 DOWNTO 0); ); data : IN STD_LOGIC_VECTOR (0 DOWNTO 0)
END COMPONENT;
BEGIN
sub_wire1 <= sub_wire0(0);
q <= sub_wire1;
sub_wire2 <= data; sub_wire3(0) <= sub_wire2; lpm_ff_component : lpm_ff GENERIC MAP ( ) lpm_fftype => "DFF", lpm_type => "LPM_FF", lpm_width => 1 PORT MAP ( clock => clock, ); data => sub_wire3, q => sub_wire0
END SYN;
(2).VHDL结构式描述顶层
--Top level entity xiaodou
library ieee;
use ieee.std_logic_1164.all;
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