显示器驱动板连接图和说明书GM2115
时间:2025-05-12
时间:2025-05-12
显示器驱动板连接图和说明书GM2115
do notcare
D1
显示器驱动板连接图和说明书GM2115
+ 3 .3 V F B1 + 3 .3 V
+ 3 .3 V F B2 3 .3 V _ DDDS C1 3 0 .1 u F C1 4 0 .1 u F
Close to respective power PinsC1 7 47uF
C1 1 47uF C2 3 0 .1 u F C2 4 0 .1 u F C2 5 0 .1 u F C2 6 0 .1 u F C2 7
+
C1 2 10uF
+
C1 5 0 .1 u F
C1 6 0 .1 u F + 2 .5 V + 3 .3 V
GND
GND GND GND 3 .3 V _ S DDS F B3 3 .3 V _ RDDS
+
C1 8 0 .1 u F
C1 9 0 .1 u F
C2 0 0 .1 u F
C2 1 0 .1 u F
C2 2 0 .1 u F
+ 3 .3 V 0 .1 u F
GND C2 8 GND
150
146 144
141 139
188 182 176 155 153 203 134 88 26 VDD_RX0_2. 5 VDD_RX1_2. 5 VDD_RX2_2. 5 VDD1_ADC_2. 5 VDD2_ADC_2. 5 CVDD_2.5 CVDD_2.5 CVDD_2.5 CVDD_2.5
0 .1 u F + 2 .5 V + 3 .3 V GND F B4 3 .3 V _ RGB C4 1 0 .1 u F C4 2 0 .1 u F C4 3 0 .1 u F C4 4 0 .1 u F GND GND + 3 .3 V F B5 3 .3 V _ DV I C4 5 47uF C2 9 47uF 160 164 168 172 157 158 161 165 169 173 181 187 193 196 175 178 184 190 197 198 GND GND P .4 P .4 PPW R P B IA S + 3 .3 V C5 3 5pF X1 1 4 .3 1 8 M Hz GND 113 114 XT AL T CL K C5 4 10uF 151 152 206 207 208 1 205 204 6 7 /RE S E T 5 4 171 170 167 166 163 162 137 136 159 194 195 179 180 185 186 191 192 3 .3 V _ DV I +5V R2 9 +5V R3 0 10K + 3 .3 V R3 5 1 0 K /ROM _ W E B A NK 0 R3 4 NC R3 6 10K RM A DDR1 4 RM A DDR9 RM A DDR8 RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM R3 8 10K A DDR1 5 A DDR1 4 A DDR1 3 A DDR1 2 A DDR1 1 A DDR1 0 A DDR9 A DDR8 A DDR7 A DDR6 A DDR5 A DDR4 A DDR3 A DDR2 A DDR1 A DDR0 31 30 2 3 29 28 4 25 23 26 27 5 6 7 8 9 10 11 12 24 22 GND GND R3 1 10K RM A DDR1 5 RM A DDR1 4 RM A DDR1 3 RM A DDR1 2 RM A DDR1 1 RM A DDR1 0
RM A DDR9 RM A DDR8 RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM RM A DDR7 A DDR6 A DDR5 A DDR4 A DDR3 A DDR2 A DDR1 A DDR0 8 9 10 11 12 13 14 15 16 17 18 19 22 23 24 25 28 29 30 31 32 33 34 35 36 1% 1K 174 GND 149 145 140 199
U3
AVDD_SDDS VDD_SDDS_3.3
Close to respective power Pins +C3 6 0 .1 u F C3 7 0 .1 u F C3 8 0 .1 u F C3 9 0 .1 u F C4 0 0 .1 u F
AVDD_DDDS VDD_DDDS_3.3
VDD_DPLL_3.3 RVDD RVDD RVDD RVDD RVDD RVDD RVDD RVDD RVDD
AVDD_RPLL
148 2 20 37 53 67 81 97 111 129
+C3 0 10uF
C3 1 47uF
+
C3 2 0 .1 u F
C3 3 0 .1 u F
C3 4 0 .1 u F
C3 5 0 .1 u F
A V DD_ A DC A V DD_ B L UE A V DD_ GRE E N A V DD_ RE D S GND_ A DC A GND_ A DC A GND_ B L UE A GND_ GRE E N A GND_ RE D A V DD_ I M B A V DD_ RX 2 A V DD_ RX 1 A V DD_ RX 0 A V DD_ RX C A GND_ I M B A GND_ RX 2 A GND_ RX 1 A GND_ RX 0 A GND_ RX C A GND_ RX P L L
C1 3 0 22pF Be a d 1 2 0 T CON_ OCL K T CON_ E CL K T CON_ L P R2 0 R2 1 R2 2 OB 7 OB 6 OB 5 OB 4 OB 3 OB 2 OB 1 OB 0 OG7 OG6 OG5 OG4 OG3 OG2 OG1 OG0 OR7 OR6 OR5 OR4 OR3 OR2 OR1 OR0 EB7 EB6 EB5 EB4 EB3 EB2 EB1 EB0 E G7 E G6 E G5 E G4 E G3 E G2 E G1 E G0 E R7 E R6 E R5 E R4 E R3 E R2 E R1 E R0 Be a d 1 2 0 T CON_ E S P R2 6 T CON_ E P OL R2 7 T CON_ E I NV R2 8 RP 1 T CON_ RS P 2 T CON_ RS P 3 T CON_ RCL K T CON_ ROE R3 2 R3 3 GP IO4 /UA RT _ DI GP IO5 /UA RT _ DO S CL S DA /ROM _ W E GP IO7 GP IO6 GP IO3 GP IO2 1 2 3 4 Be a d 1 2 0 Be a d 1 2 0 LP
C1 2 8 22pF
C1 2 9 22pF B CL K A CL K P .4 P .4 P .4
GND
A GND GND
118 DCL K /T CON_ OCL K 1 1 5 DE N/T CON_ ECL K 1 1 7 DV S /T CON_ FS Y NC 1 1 6 DHS /T CON_ L P P D4 7 /OB 7 P D4 6 /OB 6 P D4 5 /OB 5 P D4 4 /OB 4 P D4 3 /OB 3 P D4 2 /OB 2 P D4 1 /OB 1 P D4 0 /OB 0 P D3 9 /OG7 P D3 8 /OG6 P D3 7 /OG5 P D3 6 /OG4 P D3 5 /OG3 P D3 4 /OG2 P D3 3 /OG1 P D3 2 /OG0 P D3 1 /OR7 P D3 0 /OR6 P D2 9 /OR5 P D2 8 /OR4 P D2 7 /OR3 P D2 6 /OR2 P D2 5 /OR1 P D2 4 /OR0 110 109 108 107 106 105 104 103 102 101 100 99 96 95 94 93 92 91 90 87 86 85 84 83 80 79 78 77 76 75 74 73 72 71 70 69 66 65 64 63 62 61 60 59 58 57 56 55 119 120 121 122 123 124 125 126 127 49 48 128
LP OB [0 . .7 ] P .4
+
C4 6 0 .1 u F
C4 7 0 .1 u F + 2 .5 V
C4 8 0 .1 u F
C4 9 0 .1 u F
C5 0 0 .1 u F
GND GND
OG[0 . .7 ] P .4
F B6 2 .5 V _ RX P L
O P T I ON + 3 .3 V
FOR
5115
C5 1 10uF
+
C5 2 0 .1 u F
D2 1 N4 1 4 8
R2 3 4 .7 K
PIN113,PIN144 为 PANEL 供电及灯 管 ON/OFF 控制 脚,高电平为 ON
V DD_ RX P L L _ 2 .5 A V S S _ RP L L A V S S _ S DDS A V S S _ DDDS PPW R P B IA S XT AL T CL K GP IO2 0 /HDA T A 3 GP IO1 9 /HDA T A 2 GP IO1 8 /HDA T A 1 GP IO1 7 /HDA T A 0 GP IO1 6 /HF S GP IO2 2 /HCL K DDC_ SCL DDC_ SDA RE S E Tn GP IO2 1 /I RQn RE D+ RE DGRE E N+ GRE E NB L UE + B L UE HS Y NC V S Y NC A DC_ TE S T RX C+ RX CRX 2 + RX 2 RX 1 + RX 1 RX 0 + RX 0 RE X T ROM ROM ROM ROM ROM ROM ROM ROM ROM ROM ROM ROM ROM ROM ROM ROM ROM ROM ROM ROM ROM ROM ROM ROM _ A DDR1 5 _ A DDR1 4 _ A DDR1 3 _ A DDR1 2 _ A DDR1 1 _ A DDR1 0 _ A DDR9 _ A DDR8 _ A DDR7 _ A DDR6 _ A DDR5 _ A DDR4 _ A DDR3 _ A DDR2 _
A DDR1 _ A DDR0 _ DA T A 7 _ DA T A 6 _ DA T A 5 _ DA T A 4 _ DA T A 3 _ DA T A 2 _ DA T A 1 _ DA T A 0
OR[0 . .7 ] P .4
1
+
C5 5 5pF C1 2 4 NC + 3 .3 V P A Pin5 为复位脚,低电平有效.5 .2 UDIO_ S D P V GA _ PG R2 5 4 .7 K P .2 DDC_ SDA _ A P .2 DDC_ SCL _ A A UDIO_ S D V GA _ PG GND
C1 2 3 NC
R2 4 A UDIO_ S D 2 .7 K B A NK 0
GND U4 V CC RS T N GND DS 1 8 1 3 3 2 1
VGA 输入检测脚, 空 信号时为高电平,TO U3 pin1
E B [0 . .7 ] P .4
GND
P D2 3 /E B 7 P D2 2 /E B 6 P D2 1 /E B 5 P D2 0 /E B 4 P D1 9 /E B 3 P D1 8 /E B 2 P D1 7 /E B 1 P D1 6 /E B 0 P D1 5 /E G7 P D1 4 /E G6 P D1 3 /E G5 P D1 2 /E G4 P D1 1 /E G3 P D1 0 /E G2 P D9 /E G1 P D8 /E G0 P D7 /E R7 P D6 /E R6 P D5 /E R5 P D4 /E R4 P D3 /E R3 P D2 /E R2 P D1 /E R1 P D0 /E R0 T CON_ OS P T CON_ OP OL T CON_ OI NV T CON_ E S P T CON_ E P OL T CON_ E I NV T CON_ RS P 2 T CON_ RS P 3 T CON_ RCL K GP IO1 0 /T CON_ ROE 3 GP IO9 /T CON_ ROE 2 T CON_ ROE
2
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