IS61LV10248中文资料(10)

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IS61LV10248

ISSI

®

AC WAVEFORMS

WRITE CYCLE NO. 2(1,2) (WE Controlled: OE is HIGH During Write Cycle)

Notes:

1.The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write, butany one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge ofthe signal that terminates the Write.

2.I/O will assume the High-Z state if OE > VIH.

10Integrated Silicon Solution, Inc. — — 1-800-379-4774

Rev.C04/13/06