EDA考试题目和答案
时间：2025-04-19
设计实验与考核
1、设计一个带计数使能、异步复位、带进位输出的增1六位二进制计数器，计数结果由共阴极七段数码管显示。
答：library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity counter is
port(clk,clk1,en,clr:in std_logic;
ledout:out std_logic_vector(6 downto 0);
scanout,scanout1,co:out std_logic);
end counter;
architecture a of counter is
signal cnt:std_logic_vector(7 downto 0);
signal led:std_logic_vector(6 downto 0);
signal scan:std_logic;
signal hex:std_logic_vector(3 downto 0);
begin
process(clk)
begin
if(clk'event and clk='1')then
if en='1'then
if clr='1'then
cnt<=(others=>'0');
else
if cnt="00111111"then
cnt<="00000000";
co<='1';
else
cnt<=cnt+'1';
co<='0';
end if;
end if;
end if;
end if;
end process;
process(clk1)
begin
if clk1'event and clk1='1'then
scan<=not scan;
end if;
Scanout=scan;
Scanout1=not scan;
end process;
ledout<=not led;
hex<=cnt(7 downto 4) when scan='1'else cnt(3 downto 0);
with hex select
led<="1111001"when"0001",
"0100100"when"0010",
"0110000"when"0011",
"0011001"when"0100",
"0010010"when"0101",
"0000010"when"0110",
"1111000"when"0111",
"0000000"when"1000",
"0010000"when"1001",
"0001000"when"1010",
"0000011"when"1011",
"1000110"when"1100",
"0100001"when"1101",
"0000110"when"1110",
"0001110"when"1111",
"1000000"when others;
end a;
2、设计一个带计数使能、同步复位、带进位输出的增1二十进制计数器，计数结果由共阴极
七段数码管显示。
答：library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity counter is
port(clk,clk1,en,clr:in std_logic;
co,scanout:out std_logic;
ledout:out std_logic_vector(6 downto 0));
end counter;
architecture rtl of counter is
signal cnt:std_logic_vector(7 downto 0);
signal led:std_logic_vector(6 downto 0);
signal scan:std_logic;
signal hex:std_logic_vector(3 downto 0);
begin
process(clk,clr)
begin
if clr='1'then
cnt<=(others=>'0');
elsif clk'event and clk='1' then
if en='1'then
if cnt="00001001"then
cnt<="00010000";
co<='0';
elsif cnt="00011001"then --注意此处，前面跳过了A到F的计数,所以计数到11001
cnt<="00000000";
co<='1';
else
cnt<=cnt+'1';
co<='0';
end if;
end if;
end if;
end process;
process(clk1)
begin
if clk1'event and clk1='1'then
scan<=not scan;
end if;
end process;
ledout<=not led;
scanout<=scan;
hex<=cnt(7 downto 4) when scan='1'else cnt(3 downto 0);
with hex select
led<="1111001"when"0001",
"0100100"when"0010",
"0110000"when"0011",
"0011001"when"0100",
"0010010"when"0101",
"0000010"when"0110",
"1111000"when"0111",
"0000000"when"1000",
"0010000"when"1001",
"1000000"when"0000",
"1111111"when others;
end rtl;
3、设计一个带计数使能、异步复位、同步装载的可逆七位二进制计数器，计数结果由共阴极
七段数码管显示。
答：library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity counter is
port(clk,clks,clr,en,stdl,dir:in std_logic;
din:in std_logic_vector(6 downto 0);
ledout:out std_logic_vector(6 downto 0);
scanout:out std_logic);
end counter;
architecture a of counter is
signal cnt:std_logic_vector(6 downto 0);
signal hex:std_logic_vector(3 downto 0);
signal led:std_logic_vector(6 downto 0);
signal scan:std_logic;
begin
process(clk)
begin
if(clk'event and clk='1')then
if clr='1'then
cnt<=(others=>'0');
elsif stdl='0'then
cnt<=din;
elsif en='1'then
if dir='1'then
cnt<=cnt+'1';
else
cnt<=cnt-'1';
end if;
end if;
end if;
end process;
process(clks)
begin
if(clks'event and clks='1')then
scan<=not scan;
end if;
end process;
scanout<=scan;
ledout<=not led;
hex<='0'&cnt(6 downto 4)when scan='1' else cnt(3 downto 0);
with hex select
led<="1111001"when"0001",
"0100100"when"0010",
"0110000"when"0011",
"0011001"when"0100",
"0010010"when"0101",
"0000010"when"0110",
"1111000"when"0111",
"0000000"when"1000",
"0010000"when"1001",
"0001000"when"1010",
"0000011"when"1011",
"1000110"when"1100",
"0100001"when"1101",
"0000110"when"1110& …… 此处隐藏：11533字，全部文档内容请下载后查看。喜欢就下载吧 ……
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