单路或非门sn74ahc1g02
时间:2026-01-18
时间:2026-01-18
关键|74AHC1G02 SN74AHC1G02DCKR SOT23【正品特价】价格 0.50元
SN74AHC1G02 SINGLE 2 INPUT POSITIVE NOR GATESCLS342L APRIL 1996 REVISED JUNE 2005
D D D D D
Operating Range of 2 V to 5.5 V Max tpd of 6.5 ns at 5 V Low Power Consumption, 10-µA Max ICC±8-mA Output Drive at 5 V Schmitt Trigger Action at All Inputs Makes the Circuit Tolerant for Slower Input Rise and Fall TimeDBV PACKAGE (TOP VIEW)
D ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101)
DCK PACKAGE (TOP VIEW)
DRL PACKAGE (TOP VIEW)
A A B GND1 5
1 2 3
5
VCC B GND4
VCC
A B
1 2 3
5
VCC Y
2
Y
GND
4
3
4
Y
See mechanical drawings for dimensions.
description/ordering informationThis device contains a single 2-input NOR gate that performs the Boolean function Y= A S B or Y= A+ B in positive logic. ORDERING INFORMATIONTA PACKAGE Reel of 3000 SOT (SOT-23) DBV 40 C 85°C 40°C to 85 C SOT (SC-70) DCK SOT (SOT-553)– DRL Reel of 250 Reel of 3000 Reel of 250 Reel of 4000 ORDERABLE PART NUMBER SN74AHC1G02DBVR SN74AHC1G02DBVT SN74AHC1G02DCKR SN74AHC1G02DCKT SN74AHC1G02DRLR AB_ AB_ A02_ TOP-SIDE MARKING
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at http://www.77cn.com.cn/sc/package. The actual top-side marking has one additional character that designates the assembly/test site. FUNCTION TABLE INPUTS A H X L B X H L OUTPUT Y L L H
logic diagram (positive logic)1 A B 4 2 Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright 2005, Texas Instruments Incorporated
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
SN74AHC1G02 SINGLE 2 INPUT POSITIVE NOR GATESCLS342L APRIL 1996 REVISED JUNE 2005
absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to VCC+ 0.5 V Input clamp current, IIK (VI< 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA Output clamp current, IOK (VO< 0 or VO> VCC) . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±20 mA Continuous output current, IO (VO= 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±25 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±50 mA Package thermal impedance,θJA (see Note 2): DBV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206°C/W DCK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 252°C/W DRL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C Stresses beyond those listed under“absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under“recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)MIN VCC VIH Supply voltage VCC= 2 V VCC= 3 V VCC= 5.5 V VCC= 2 V VIL VI VO IOH Low-level input voltage Input voltage Output voltage VCC= 2 V VCC= 3.3 V± 0.3 V VCC= 5 V± 0.5 V VCC= 2 V IOL Low-level output current VCC= 3.3 V± 0.3 V VCC= 5 V± 0.5 V VCC= 3.3 V± 0.3 V VCC= 5 V± 0.5 V VCC= 3 V VCC= 5.5 V 0 0 2 1.5 2.1 3.85 0.5 0.9 1.65 5.5 VCC 50 4 8 50 4 8 100 20 ns/V mA mA mA V V mA V V MAX 5.5 UNIT V
High-level input voltage
High-level output current
t/ v
Input transition rise or fall rate
TA Operating free-air temperature 40 85°C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
SN74AHC1G02 SINGLE 2 INPUT POSITIVE NOR GATESCLS342L APRIL 1996 REVISED JUNE 2005
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)PARAMETER TEST CONDITIONS VCC 2V IOH= 50 mA VOH IOH= 4 mA IOH= 8 mA IOL= 50 mA VOL IOL= 4 mA IOL= 8 mA II ICC Ci VI= 5.5 V or GND VI= VCC or GND, VI= VCC or GND IO= 0 3V 4.5 V 3V 4.5 V 2V 3V 4.5 V 3V 4.5 V 0 V to 5.5 V 5.5 V 5V 4 MIN 1.9 2.9 4.4 2.58 3.94 0.1 0.1 0.1 0.36 0.36±0.1 1 10 TA= 25°C TYP MAX 2 3 4.5 …… 此处隐藏:13581字,全部文档内容请下载后查看。喜欢就下载吧 ……
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