TVS Diode Array

For ESD and Latch-Up Protection

PROTECTION PRODUCTSDescription

The SMF series TVS arrays are designed to protect sen-sitive electronics from damage or latch-up due to ESDand other voltage-induced transient events. They aredesigned for use in applications where board space is ata premium. Each device will protect up to five lines. Theyare unidirectional devices and may be used on lines wherethe signal polarities are above ground.

TVS diodes are solid-state devices designed specificallyfor transient suppression. They feature large cross-sec-tional area junctions for conducting high transient cur-rents. They offer desirable characteristics for board levelprotection including fast response time, low operatingand clamping voltage, and no device degradation.

The SMF series devices may be used to meet the immu-nity requirements of IEC 61000-4-2, level 4. The smallSC70 package makes them ideal for use in portable elec-tronics such as cell phones, PDA’s, notebook comput-ers, and digital cameras.

SMF05C

ESD protection for data lines to

IEC 61000-4-2 (ESD) ±15kV (air), ±8kV (contact)IEC 61000-4-4 (EFT) 40A (5/50ns)

Small package for use in portable electronicsProtects five I/O linesWorking voltage: 5VLow leakage current

Low operating and clamping voltagesSolid-state silicon-avalanche technology

EIAJ SC70-6L package

Molding compound flammability rating: UL 94V-0Marking : Marking Code

Packaging : Tape and Reel per EIA 481

Cellular Handsets and AccessoriesCordless Phones

Personal Digital Assistants (PDA’s)Notebooks and HandheldsPortable InstrumentationDigital CamerasPeripheralsMP3 Players

Circuit DiagramSchematic & PIN Configuration

Revision 08/04/04

1

SMF05C

PROTECTION PRODUCTSAbsolute Maximum Rating

Rating

PeakPulsePower(tp=8/20µs)PeakPulseCurrent(tp=8/20µs)ESDperIEC61000-4-2(Air)

ESDperIEC61000-4-2(Contact)LeadSolderingTemperatureOperatingTemperatureStorageTemperature

SymbolPpkIPPVESDTLTJTSTG

Value10082015

260(10seconds)-55to+125-55to+150

UnitsWattsAkV

o

CCC

o

o

Electrical Characteristics

SMF05C

Parameter

ReverseStand-OffVoltageReverseBreakdownVoltageReverseLeakageCurrentClampingVoltageClampingVoltageJunctionCapacitance

SymbolVRWMVBRIRVCVCCj

It=1mAVRWM=5V,T=25°CIPP=5A,tp=8/20µsIPP=8A,tp=8/20µsVR=0V,f=1MHz

6

59.812.5130

Conditions

Minimum

Typical

Maximum

5

UnitsVVµAVVpF

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SMF05C

Power Derating Curve

11010090% of Rated Power

or IPP

8070605040302010

PROTECTION PRODUCTSTypical Characteristics

Non-Repetitive Peak Pulse Power vs. Pulse Time

10Peak Pulse Power - Ppk (kW)

1

0.1

0.01

0.1

1

10

Pulse Duration - tp (µs)

100

1000

00

25

50

75

100

o

125150

Ambient Temperature - TA (C)

Pulse Waveform

1101009080Percent

of IPP

7060504030201000

5

10

15Time (µs)

20

25

30

Clamping Voltage vs. Peak Pulse Current

98Clamping

Voltage - VC (V)

765432100

2

4

6

8

10

Peak Pulse Current - IPP (A)

Capacitance vs. Reverse Voltage

140120Capac

itance - Cj (pF)

10080604020

ESD Clamping Characteristics

(8kV Contact Discharge per IEC 61000-4-2)

00

1

2

3

4

5

6

Reverse Voltage - VR (V)

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SMF05C

SMF05C Circuit Diagram

1

3

4

5

6

PROTECTION PRODUCTSApplications Information

Device Connection for Protection of Five Data LinesThe SMF05C is designed to protect up to five unidirec-tional data lines. The device is connected as follows:1.Unidirectional protection of five I/O lines is

achieved by connecting pins 1, 3, 4, 5 and 6 to thedata lines. Pin 2 is connected to ground. Theground connection should be made directly to theground plane for best results. The path length iskept as short as possible to reduce the effects ofparasitic inductance in the board traces.Circuit Board Layout Recommendations for Suppres-sion of ESD.

Good circuit board layout is critical for the suppressionof ESD induced transients. The following guidelines arerecommended:

zPlace the SMF05C near the input terminals or

connectors to restrict transient coupling.

zMinimize the path length between the SMF05C and

the protected line.

zMinimize all conductive loops including power and

ground loops.

zThe ESD transient return path to ground should be

kept as short as possible.

zNever run critical signals near board edges.zUse ground planes whenever possible.Matte Tin Lead Finish

Matte tin has become the industry standard lead-freereplacement for SnPb lead finishes. A matte tin finishis composed of 100% tin solder with large grains.Since the solder volume on the leads is small com-pared to the solder paste volume that is placed on theland pattern of the PCB, the reflow profile will bedetermined by the requirements of the solder paste.Therefore, these devices are compatible with bothlead-free and SnPb assembly techniques. In addition,unlike other lead-free compositions, matte tin does nothave any added alloys that can cause degradation ofthe solder joint.

Protection of Five Unidirectional Lines

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SMF05C

PROTECTION PRODUCTSTypical Applications

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SMF05C

PROTECTION PRODUCTSOutline Drawing - SC70 6L

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SMF05C

PROTECTION PRODUCTSMarking Codes

PartNumberSMF05C

MarkingCode5C

Note:

(1) Pin 1 Identified with a dot

Ordering Information

PartNumberSMF05C.TCSMF05C.TCT

LeadFinishSnPbMatteSn

QtyperReel3,0003,000

ReelSize7Inch7Inch

Contact Information

Semtech CorporationProtection Products Division

200 Flynn Road, Camarillo, CA 93012Phone: (805)498-2111 FAX (805)498-3804

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