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12.3.1 TACTL, Timer_A Control Register12.3.1 TACTL ，定时器A控制寄存器

Unused Bits 15-10 Unused(15-10未使用未使用的位)

TASSELx Bits 9-8 Timer_A clock source select(TASSELx 9-8位定时器A时钟源选择)

00 TACLK

01 ACLK

10 SMCLK 11 INCLK (INCLK is device-specific and is often assigned to the inverted TBCLK) (see thedevice-specific data sheet) 00 TACLK

01 ACLK

10 SMCLK

11 INCLK （ INCLK是设备特定的，通常被分配到倒TBCLK ）（看到thedevice特定数据表） IDx Bits 7-6 Input divider. These bits select the divider for the input clock.

IDX位7-6输入分频器。这些位选择输入时钟分频器

00 /1

01 /2

10 /4

11 /8

MCx Bits 5-4 Mode control. Setting MCx = 00h when Timer_A is not in use conserves power

MCX 5-4位模式控制。设置MCX = 00H时，定时器A在不使用节省电力

Mode control. Setting MCx = 00h when Timer_A is not in use conserves power.

00 Stop mode: the timer is halted.(停止模式：停止计时器。)

01 Up mode: the timer counts up to TACCR0.(01模式：定时器计数TACCR0)

10 Continuous mode: the timer counts up to 0FFFFh.(10连续模式：定时器计数到0FFFFH 。) 11 Up/down mode: the timer counts up to TACCR0 then down to 0000h.(11模式：向上/向下计数高达TACCR0然后下降到0000h 。)

Unused Bit 3 Unused(未使用的位3未使用)

TACLR Bit 2 Timer_A clear. Setting this bit resets TAR, the clock divider, and the count direction. The TACLR bit is automatically reset and is always read as zero.

我自己翻译的

TACLR第2位定时器A清晰。设置该位复位西藏自治区，时钟分频器，计数方向。 TACLR位

自动复位和阅读始终为零。

TAIE Bit 1 Timer_A interrupt enable. This bit enables the TAIFG interrupt request.

0 Interrupt disabled 1 Interrupt enabled'

达英第1位定时器A中断使能。这位使TAIFG的中断请求。

0禁止中断

1中断启用

TAIFG Bit 0 Timer_A interrupt flag

0 No interrupt pending

1 Interrupt pending

TAIFG 0位定时器A中断标志

0无中断挂起

1中断挂起

12.3.2 TAR，定时器A注册

TARx位15-0定时器A寄存器。西藏自治区寄存器是定时器A计数。

12.3.3 TACCRx, Timer_A Capture/Compare Register x

12.3.3 TACCRx ，定时器A的捕获/比较寄存器x

TACCRx Bits 15-0 Timer_A capture/compare register.(TACCRx位15-0定时器A捕获/比较寄存器。) Compare mode: TACCRx holds the data for the comparison to the timer value in the Timer_A Register,TAR 比较模式， ： TACCRx持有定时器A寄存器中的定时器值的比较数据，

Capture mode: The Timer_A Register, TAR, is copied into the TACCRx register when a capture is

performed.

捕获模式：定时器A注册，西藏自治区，复制到TACCRx寄存器，当捕捉

执行。

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CMx Bit 15-14 Capture mode

00 No capture

01 Capture on rising edge

10 Capture on falling edge 11 Capture on both rising and falling edges

CMX位15-14捕捉模式

00无捕捉

01上升沿捕捉

10下降沿捕获

11上升沿和下降沿捕捉

CCISx Bit 13-12 Capture/compare input select. These bits select the TACCRx input signal. See the device-specific data

sheet for specific signal connections.

00 CCIxA

01 CCIxB

10 GND 11 VCC

CCISx位13-12捕捉/比较输入选择。这些位选择TACCRx的输入信号。设备特定数据 为特定的信号连接表。

00 CCIxA

01 CCIxB

10接地

11 VCC的

SCS Bit 11 Synchronize capture source. This bit is used to synchronize the capture input signal with the timer clock. 0 Asynchronous capture

1 Synchronous capture

11 SCS位同步捕获源。此位是用来捕捉输入信号与定时器时钟同步。

0异步捕获

1同步捕获

SCCI Bit 10 Synchronized capture/compare input. The selected CCI input signal is latched with the EQUx signal and can

be read via this bit

SCCI 10位同步捕获/比较输入。选定CCI输入信号锁存与EQUx信号，并能

通过该位被读取

Unused Bit 9 Unused. Read only. Always read as 0.

未使用的位未使用。只读。始终读为0

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CAP Bit 8 Capture mode

0 Compare mode

1 Capture mode 第8位捕捉模式

0比较模式

1捕捉模式

OUTMODx Bits 7-5 Output mode. Modes 2, 3, 6, and 7 are not useful for TACCR0, because EQUx = EQU0. 000 OUT bit value

001 Set

010 Toggle/reset

011 Set/reset

100 Toggle

101 Reset

110 Toggle/set

111 Reset/set OUTMODx位7-5输出模式。模式2，3 ， 6和7是没有用，为TACCR0 ，因为EQUx = EQU0 。000人的位值

001集

010切换/复位

011集/复位

100切换

101复位

110切换/套 111复位/套

CCIE Bit 4 Capture/compare interrupt enable. This bit enables the interrupt request of the corresponding CCIFG flag. 0 Interrupt disabled

1 Interrupt enabled

CCIE的第4位捕获/比较中断使能。该位使能中断请求相应CCIFG标志。

0禁止中断

1中断启用

CCI Bit 3 Capture/compare input. The selected input signal can be read by this bit.

CCI的第3位捕获/比较输入。可以读取该位选定的输入信号。

OUT Bit 2 Output. For output mode 0, this bit directly controls the state of the output.

0 Output low

1 Output high

OUT 2位输出。输出模式0 ，该位直接控制输出的状态。

0输出低

1输出高

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