NAND128W3A0CN1中文资料(18)

NAND128-A, NAND256-A, NAND512-A, NAND01G-A

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Table 6. Address Insertion, x8 Devices

Note: 1.A8 is set Low or High by the 00h or 01h Command, see Pointer Operations section.

2.Any additional address input cycles will be ignored.

3.The 4th cycle is only required for 512Mb and 1Gb devices.

Table 7. Address Insertion, x16 Devices

Note: 1.

A8 is Don’t Care in x16 devices.

2.Any additional address input cycles will be ignored.

3.The 01h Command is not used in x16 devices.

4.

The 4th cycle is only required for 512Mb and 1Gb devices.

Table 8. Address Definitions

Bus Cycle

I/O7I/O6I/O5I/O4I/O3I/O2I/O1I/O01st A7A6A5A4A3A2A1A02nd A16A15A14A13A12A11A10A93rd A24A23A22A21A20A19A18A174th(4)

V IL

V IL

V IL

V IL

V IL

V IL

A26

A25

Bus Cycle I/O8-I/O15I/O7I/O6I/O5I/O4I/O3I/O2I/O1I/O01st X A7A6A5A4A3A2A1A02nd X A16A15A14A13A12A11A10A93rd X A24A23A22A21A20A19A18A174th(4)

X

V IL

V IL

V IL

V IL

V IL

V IL

A26

A25

Address Definition A0 - A7Column Address A9 - A26Page Address A9 - A13Address in Block A14 - A26

Block Address

A8

A8 is set Low or High by the 00h or 01h Command, and is

Don’t Care in x16 devices

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