元器件交易网

ADuM1230

SPECIFICATIONS

ELECTRICAL CHARACTERISTICS

All voltages are relative to their respective ground. 4.5 V ≤ VDD1 ≤ 5.5 V, 12 V ≤ VDDA ≤ 18 V, 12 V ≤ VDDB ≤ 18 V. All min/max

specifications apply over the entire recommended operating range, unless otherwise noted. All typical specifications are at TA = 25°C, VDD1 = 5 V, VDDA = 15 V, VDDB = 15 V. Table 1.

Parameter

DC SPECIFICATIONS

Input Supply Current, Quiescent

Output Supply Current, A or B, Quiescent Input Supply Current, 10 Mbps

Output Supply Current, A or B, 10 Mbps Input Currents

Logic High Input Threshold Logic Low Input Threshold Logic High Output Voltages

Logic Low Output Voltages

Output Short-Circuit Pulsed Current1SWITCHING SPECIFICATIONS Minimum Pulse Width2

Maximum Switching Frequency3Propagation Delay4

Change vs. Temperature

Pulse Width Distortion, |tPLH tPHL| Channel-to-Channel Matching, Rising or Falling Edges5

Channel-to-Channel Matching, Rising vs. Falling Edges6

Part-to-Part Matching, Rising or Falling Edges7Part-to-Part Matching, Rising vs. Falling Edges8Output Rise/Fall Time (10% to 90%)

Short-circuit duration less than 1 second. Average power must conform to the limit shown under the Absolute Maximum Ratings. The minimum pulse width is the shortest pulse width at which the specified timing parameters are guaranteed. 3

The maximum switching frequency is the maximum signal frequency at which the specified timing parameters are guaranteed. 4

tPHL propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. tPLH propagation delay is measured from the 50% level of the rising edge of the VIx signal to the 50% level of the rising edge of the VOx signal. 5

Channel-to-channel matching, rising vs. falling edges is the magnitude of the propagation delay difference between two channels of the same part when the inputs are either both rising edges or falling edges. The supply voltages and the loads on each channel are equal. 6

Channel-to-channel matching, rising or falling edges is the magnitude of the propagation delay difference between two channels of the same part when one input is a rising edge and the other input is a falling edge. The supply voltages and loads on each channel are equal. 7

Part-to-part matching, rising or falling edges is the magnitude of the propagation delay difference between the same channels of two different parts when the inputs are either both rising or falling edges. The supply voltages, temperatures, and loads of each part are equal. 8

Part-to-part matching, rising vs. falling edges is the magnitude of the propagation delay difference between the same channels of two different parts when one input is a rising edge and the other input is a falling edge. The supply voltages, temperatures, and loads of each part are equal.

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Symbol

IDDI (Q) IDDA (Q), IDDB (Q)IDDI (10) IDDA (10), IDDB (10)

IIA, IIB, IDISABLEVIH VIL

VOAH, VOBH

Min Typ Max Unit Test Conditions 4.0 mA 8.0 mA CL = 200 pF

10 +0.01 +10 μA 0 ≤ VIA, VIB, VDISABLE ≤ VDD12.0 V 0.8 V

IOA, IOB = 1 mA VDDA 0.1, VDDA, VDDB

VDDB 0.1

VOAL, VOBL IOA, IOB = 1 mA IOA (SC), IOB (SC)100 PW 100 ns CL = 200 pF 10 Mbps CL = 200 pF tPHL, tPLH 97 124 160 ns CL = 200 pF 100 ps/°C PWD 8 ns CL = 200 pF CL = 200 pF CL = 200 pF CL = 200 pF CL = 200 pF tR/tF CL = 200 pF

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